Covered slit isolation between integrated circuit devices

Details Covered slit isolation between integrated circuit devices Covered slit isolation between integrated circuit devices

1998-03-20

2000-12-26

Booth, Richard

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438424, 438296, H01L 218247

Patent

active

06165843&

ABSTRACT:
A capped slit provides isolation between adjacent devices of an integrated circuit. The cap and slit provide very high immunity to punchthrough and protect the edge of the slit against becoming exposed during subsequent processing that could otherwise remove field oxide. In one embodiment, the capped slit isolates two cells of a flash EEPROM device, and the field oxide lines the slit and serves as the tunneling oxide in the cells. In another embodiment, the slit is filled with a plug of dielectric material.

REFERENCES:
patent: 5731241 (1998-03-01), Jang et al.
patent: 5741740 (1998-04-01), Jang et al.
patent: 5866465 (1999-02-01), Doan et al.
patent: 5868870 (1999-02-01), Fazan et al.
patent: 5923992 (1999-07-01), Spikes et al.
patent: 5943590 (1999-08-01), Wang et al.
patent: 6008095 (1999-12-01), Gardner et al.
patent: 6020230 (2000-02-01), Wu

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