Coupling well structure for improving HVMOS performance

Details Coupling well structure for improving HVMOS performance Coupling well structure for improving HVMOS performance

2010-09-21

2011-11-01

Bryant, Kiesha (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

With means to increase breakdown voltage threshold

C257S409000, C257SE29063

Reexamination Certificate

active

08049295

ABSTRACT:
A semiconductor structure includes a substrate, a first well region of a first conductivity type overlying the substrate, a second well region of a second conductivity type opposite the first conductivity type overlying the substrate, a cushion region between and adjoining the first and the second well regions, an insulation region in a portion of the first well region and extending from a top surface of the first well region into the first well region, a gate dielectric extending from over the first well region to over the second well region, wherein the gate dielectric has a portion over the insulation region, and a gate electrode on the gate dielectric.

REFERENCES:
patent: 5912493 (1999-06-01), Gardner et al.
patent: 6265752 (2001-07-01), Liu et al.
patent: 2006/0170060 (2006-08-01), Wu et al.
Plummer, Silicon VLSI Technology Fundamentals, Practice and Modeling, 2000, Prentice Hall, pp. 17-18.

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