Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Solder wettable contact – lead – or bond
Patent
1997-08-04
2000-11-28
Hardy, David
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Solder wettable contact, lead, or bond
257737, 257738, 438613, 22818022, H01L 2348, H01L 2352, H01L 2940
Patent
active
061539406
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a solder bump of inhomogeneous material composition, in particular for producing connections between connector surfaces of electrical components or substrates in flip-chip technology, as well as to a method of fabricating such a solder bump.
Its field of application is wherever two or more material components (e.g.: chips, different substrate materials, IC components, electronic structural elements) are to be connected to each other mechanically and/or electrically by solder material. For this purpose, several processes have been established in the past, such as, for instance, wire bonding in which two terminal or metallization pads are connected to each other. In the more recent flip-chip technology solder bumps are applied by conventional methods to the terminal or contact surfaces of the material components to be connected. A plurality of permanent connections are thereafter fabricated in a single fabrication step by soldering, thermo-compression or bonding to yield a high connection or terminal density. This is used, for instance, for connecting two or more chips or for mounting and/or contacting chips on substrates, especially for forming multi-chip-modules (MCM). To this end, the solder bumps are applied either to a terminal pad of the substrate only, or to the terminal pad of the chip, or to both. The term used in the art for applying solder bumps to terminal pads is "bumping". In the context of flip-chip technology, the invention may generally be practiced in all those fields in which ever smaller components or increasingly higher frequencies (or very low capacitances and inductances) or high integration densities are required or beneficial, as, for instance, in the fields of application of integrated optics and/or micro wave technology.
2. The State of the Art
A plurality of functional layers are required for the fabrication of a solder bump. The lowest layer system is called the under bump metallization (abbr.: UBM). It serves as a priming layer for the bond pad metallization of a chip and, at the same time, as a wettable layer for the solder system subsequently to be applied, viz.: a solder bump. To satisfy these two functions, a plurality of layers are conventionally applied as UBM, such as, for instance, of chromium (Cr) and copper (Cu), titanium (Ti) and copper (Cu), titanium-tungsten (Ti:W) and copper (Cu). Since conventional bumps melt completely in the reflow and soldering processes of the flip-chip assembly and come into contact with the UBM, this metallurgy must be specially optimized in respect of mechanical stresses and intermetallic phase formations. In conventional solder bumps, the quality of the UBM is exceptionally critical as regards the reliability of the complete assembly.
The soldering metal is deposited on the UBM layer either as a layer system or as an alloy. The processes employed to this end usually are vapor deposition or galvanic processes, as well as autocatalytic deposition processes. Thereafter, the entire layer structure is homogenized by a reflow process, with the temperature being selected such that the entire solder structure is fused. The galvanic processes and vapor deposition processes require a process artwork, such as a mask, by means of which the position of the connector surfaces and their dimensions and distances from one another are determined. The photo lithographic structuring methods require clean room conditions and involve high investment costs. This, in respect of galvanic processes and vapor deposition processes, entails serious disadvantages, viz.; they can be economically employed only in large production runs and with complete wafers. Autocatalytic processes suffer from the disadvantage that in most applications they are severely limited in respect of the materials which may be used.
Normally, solder bumps made of a homogeneous material are at present used in flip-chip fabrication. Among them are, for instance, the following alloys of tin (Sn) and lead (Pb): Sn/Pb 60
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Eldring Joachim
Nave Jens
Zakel Elke
Clark Jhihan B.
Fraunhofer Gesellschaft zur Foerderung der angewandten Forschung
Hardy David
Hormann Karl
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