Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
1999-08-31
2001-04-03
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S124000, C438S126000, C438S127000
Reexamination Certificate
active
06210992
ABSTRACT:
BACKGROUND
This invention relates generally to packaging electronic components and in particular embodiments to encapsulating laminate packages.
Laminate packages may be made of alternating core material and conductive layers. The core acts as a stiffener and insulator while the conductive layers are etched to leave a trace for electrical purposes. The laminate structure may have a solder resist selectively screen printed onto specific areas of the structure for solder protection.
A laminate package may be encapsulated by enclosing the unencapsulated package inside two halves of a mold. At the juncture of the two mold faces, encapsulants sometimes leak forming what is known as flash. The encapsulant leaking between the two mold halves may actually contaminate the electrical components that come in contact with the encapsulant. Generally when this happens, the devices are deemed defective and the entire laminated package is discarded.
In some cases, the leakage of encapsulant material is a result of the bleeding out of the resin vehicle from the overall epoxy. See, Ireland, James E., “Epoxy Bleeding Out in Ceramic Chip Carriers,” ISHM Journal, Vol. 5, No. 1. Regardless of whether the contamination occurs because of the bleed out of the resin vehicle from the overall adhesive or from the leakage of the overall resin itself, the effects of such leakage on electronic components may be catastrophic.
Thus, there is a need to prevent flash contamination of the electrical components of electrical packages and particularly for preventing such contamination in the course of encapsulating laminate packages.
SUMMARY
In accordance with one aspect, a process for encapsulating integrated circuits includes defining an encapsulation cavity about an integrated circuit die. The cavity is filled with an encapsulant. The outflow of encapsulant is controlled by providing a collection reservoir proximate to the cavity.
Other aspects are set forth in the accompanying specification and claims.
REFERENCES:
patent: 5041395 (1991-08-01), Steffen
patent: 6143581 (2000-11-01), Johnson et al.
patent: 6146924 (2000-11-01), Chang et al.
Bolken Todd O.
Brand Joseph M.
Corisis David J.
Dickey Brenton L.
Rumsey Brad D.
Jones Josetta I.
Micro)n Technology, Inc.
Niebling John F.
Trop, Pruner & Hu. P.C.
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