Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-03-31
2000-06-27
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438244, 438246, 438247, 438386, 438387, 438389, 438390, H01L 28242
Patent
active
060806184
ABSTRACT:
Reduced variations in buried layer across the chip is provided. The reduction in variation is achieved by defining the top surface of the buried layer and then the lower surface of the buried layer. This results in improved control buried strap variations, thereby improving performance of the IC.
REFERENCES:
patent: 5389559 (1995-02-01), Hsieh et al.
patent: 5395786 (1995-03-01), Hsu et al.
Alsmeier Johann
Bergner Wolfgang
Braden Stanton C.
Kennedy Jennifer M.
Niebling John F.
Siemens Aktiengesellschaft
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