Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2008-07-15
2008-07-15
Luu, Pho M. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Signals
C365S189110, C365S194000
Reexamination Certificate
active
07400542
ABSTRACT:
A control selection circuit for a semiconductor device including a pulse generation circuit to delay a first pulse signal by a predetermined delay time to generate a second pulse signal, a frequency information generation circuit to generate a selection signal in response to the second pulse signal, the selection signal indicating an operating frequency of the semiconductor device, and a control circuit to select a control scheme of for the semiconductor device in response to the selection signal.
REFERENCES:
patent: 5617365 (1997-04-01), Horiguchi et al.
patent: 6532177 (2003-03-01), Butler
patent: 2004/0252577 (2004-12-01), Kwak et al.
patent: 2005-004591 (2005-01-01), None
patent: 1999-0080723 (1999-11-01), None
patent: 2002-0082534 (2002-10-01), None
patent: 2004-0001434 (2004-01-01), None
English language abstract of Korean Publication No. 1999-0080723.
English language abstract of Korean Publication No. 2002-0082534.
English language abstract of Korean Publication No. 2004-0001434.
English language abstract of Japanese Publication No. 2005-004591.
Luu Pho M.
Marger & Johnson & McCollom, P.C.
Samsung Electronics Co,. Ltd.
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