Control of hot carrier injection in a metal-oxide...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C257SE21417

Reexamination Certificate

active

07820517

ABSTRACT:
In a metal-oxide semiconductor device including first and second source/drain regions of a first conductivity type formed in a semiconductor layer of a second conductivity type proximate an upper surface of the semiconductor layer, a drift region formed in the semiconductor layer proximate the upper surface of the semiconductor layer and at least partially between the first and second source/drain regions, an insulating layer formed on at least a portion of the upper surface of the semiconductor layer, and a gate formed on the insulating layer and at least partially between the first and second source/drain regions, a method for controlling an amount of hot carrier injection degradation in the device includes the steps of: forming a shielding structure on the insulating layer above at least a portion of the drift region and substantially between the gate and the second source/drain region; and adjusting an amount of coverage of the shielding structure over an upper surface of the drift region so as to minimize the amount of hot-carrier injection degradation while maintaining a breakdown voltage in the device which is greater than or equal to a prescribed value.

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S. Manzini et al., “Hot-Electron-Induced Degradation in High-Voltage Submicron DMOS Transistors,” Proc. IEEE ISPSD, pp. 65-68, 1996.
D. Brisbin et al., “Hot Carrier Reliability of N-LDMOS Transistor Arrays for Power BiCMOS Applications,” Proc. IEEE IRPS, pp. 105-110, 2002.
P. Moens et al., “A Unified Hot Carrier Degradation Model for Integrated Lateral and Verical nDMOS Transistors,” Proc. IEEE ISPSD, pp. 88-91, 2003.
S. Xu et al., “High Power Silicon RF LDMOSFET Technology for 2.1GHz Power Amplifier Applications,” Proc. IEEE ISPSD, pp. 190-193, 2003.
T. Nigam et al., “Nature and Location of Interface Traps in RF LDMOS due to Hot Carriers,” INFOS, Barcelona, Spain, 4 pages, 2003.

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