Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Reexamination Certificate
1999-05-05
2001-07-10
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
C438S010000, C438S011000, C438S017000
Reexamination Certificate
active
06258613
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a control method of a semiconductor manufacturing process such as a thermal oxidation step and an ion implantation step, a control method of semiconductor manufacturing equipment such as an oxidation furnace and an ion implanter, and a control method of a semiconductor manufacturing environment such as a clean room.
2. Description of the Background Art
Conventionally, a silicon wafer used in many semiconductor devices was a wafer produced by growing a crystal by the Czochralski method (hereinafter referred to as “CZ wafer”). The CZ wafer, however, has a number of COPs (Crystal Originated Particle), and the size of COPs compared to the element size has been increasing with a recent trend of high integration and downsizing. The existence of COPs thus caused reduced yield of semiconductor device manufacturing. Thus, in recent years, many semiconductor devices have employed a wafer produced by growing an epitaxial layer on a CZ substrate (hereinafter referred to as “epitaxial wafer”) as a silicon wafer.
FIG. 31
is a cross-sectional view showing the structure of an epitaxial wafer
100
. By an epitaxial growth method, an epitaxial layer
102
is formed on the upper surface of a CZ substrate
101
. The epitaxial wafer itself generally has higher gettering capabilities than the CZ wafer, but in most cases, impurity trap regions are formed inside or on the rear surface of the wafer for further improvement of the gettering capabilities. Especially, a gettering technique for forming a PBS (Polysilicon Back Seal)
103
of polysilicon on the rear surface of the wafer has widely been employed as for the epitaxial wafer
100
shown in FIG.
31
.
In this fashion, it has been a common practice in recent years to manufacture semiconductor devices such as an LSI (Large Scale Integrated circuit) by the use of an epitaxial wafer with a PBS on the rear surface. This specification is also presented on the premise that a semiconductor device is formed on an epitaxial wafer with a PBS on the rear surface, namely, the epitaxial wafer
100
in FIG.
31
. Further, in the specification, a wafer on which a semiconductor device as a product is formed is especially referred to as “product wafer”.
LSIs are manufactured through a number of semiconductor manufacturing steps such as oxidation, diffusion, implantation, sputtering, and etching. To manufacture high-performance semiconductor devices, those steps are controlled. Now, we will describe a conventional control method of a semiconductor manufacturing process, e.g., a process for manufacturing a gate oxide film. The manufacturing process of gate oxide films means a series of steps of cleaning a silicon substrate, forming a gate oxide film by thermal oxidation, and depositing a polysilicon film on the gate oxide film. Thus, control of the manufacturing process of gate oxide films indicates control of the presence or absence of imperfections in the series of steps, e.g., control of the presence or absence of deterioration in the semiconductor manufacturing equipment (cleaning bath, oxidation furnace, CVD device, etc.) for use in the manufacturing process of gate oxide films.
The control of the manufacturing process of gate oxide films is intended, for example, to ensure reliability of gate oxide films formed on a product wafer. To achieve this, a control-only wafer (hereinafter referred to as “monitor wafer”) different from the product wafer is used.
FIG. 32
is a cross-sectional view showing the structure of a monitor wafer
104
. The epitaxial layer
102
is formed on the upper surface of the CZ substrate
101
by the epitaxial growth method. On the rear surface of the CZ substrate
101
, the PBS
103
is formed. A comparison between
FIGS. 32 and 31
shows that the same type of wafer used as the product wafer is used as the monitor wafer. Thus, the control of the manufacturing process of gate oxide films is accomplished by forming a gate oxide film on the upper surface of the monitor wafer
104
and evaluating the characteristics of that gate oxide film. More specifically, an MOS structure is formed with the gate oxide film and the characteristics of that gate oxide film are evaluated using well-known evaluation techniques such as leakage current evaluation, C-V evaluation, Time Zero Dielectric Breakdown (TZDB) evaluation, and Time Dependence Dielectric Breakdown (TDDB) evaluation. When the obtained characteristics show no variation from the normal, we can judge that there is no imperfection in the manufacturing process. When the characteristics vary from the normal, we can judge that there are imperfections in the manufacturing process.
On the other hand, to stabilize the manufacture of high-performance semiconductor devices, it is important not only to control the semiconductor manufacturing process as described above but also to control semiconductor manufacturing equipment, e.g., to control deterioration in the semiconductor manufacturing equipment. Equipment for manufacturing gate oxide films, for example, includes a cleaning bath for cleaning a silicon substrate and an oxidation furnace for thermally oxidizing the cleaned silicon substrate. Now, we will describe a conventional control method of semiconductor manufacturing equipment, e.g., an oxidation furnace. Deterioration of the oxidation furnace can be detected by variations in the characteristics of the gate oxide film evaluated during the above control of the semiconductor manufacturing process.
FIGS. 33 and 34
are cross-sectional views to explain the conventional control method of the semiconductor manufacturing equipment. By thermal oxidation using the oxidation furnace, a silicon oxide film
105
is formed on the upper surface of the epitaxial layer
102
in the monitor wafer
104
. At this time, deterioration of the oxidation furnace causes the mixing of impurities
106
into the monitor wafer
104
. Although some of the impurities
106
are absorbed by the gettering capabilities of the monitor wafer
104
itself or of the PBS
103
, the other are stored in the silicon oxide film
105
or in the interface between the epitaxial layer
102
and the silicon oxide film
105
. This results in fluctuations in the oxidation rate, etc., causing anomalies in the thickness or quality of the silicon oxide film
105
. In this condition, when a polysilicon film
107
is formed on the silicon oxide film
105
to evaluate the characteristics of the silicon oxide film
105
, the evaluated characteristics vary from those in normal conditions. Accordingly, we can judge deterioration of the oxidation furnace when the characteristics of the silicon oxide film
105
vary from the normal.
The control of the semiconductor manufacturing equipment by this method is applicable not only to the manufacturing equipment of gate oxide films but also to other semiconductor manufacturing equipment such as an ion implanter. For instance, deterioration of the ion implanter causes the mixing of impurities such as Fe into the monitor wafer
104
. In this case, by evaluating the characteristics of the silicon oxide film
105
after ion implantation and checking the presence or absence of variations in the characteristics from the normal, deterioration of the ion implanter can be evaluated.
On the other hand, as the semiconductor manufacturing process is carried out in a clean room, cleanliness of the clean room has great influence over reliability of semiconductor devices to be manufactured. When impurities (boron, phosphorus, etc.) in a filter provided in the clean room are dissolved by HF vapor and thereby cleanliness of the clean room is deteriorated, for example, those impurities are deposited on the product wafer, resulting in variations in characteristics and deterioration in reliability of semiconductor devices to be formed. Thus, it is also necessary to control the cleanliness of the clean room to ensure reliability of semiconductor devices.
FIGS. 35 and 36
are cross-sectional views to explain a conventional control method of
Estrada Michelle
Fourson George
Mitsubishi Denki & Kabushiki Kaisha
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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