Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Reexamination Certificate
2007-05-08
2007-05-08
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
C326S093000, C327S201000, C327S218000
Reexamination Certificate
active
10996084
ABSTRACT:
Multi-Threshold CMOS (MTCMOS) devices include a high threshold voltage current control switch that is responsive to a first control signal, a low threshold voltage logic circuit and a flip-flop that is configured to store data from the low threshold voltage logic circuit and that is responsive to a second control signal. A control circuit also is provided that is configured to change a logic state of the second control signal and then, after a first delay, to change a logic state of the first control signal, in response to the MTCMOS device entering a sleep mode. The control circuit is further configured to change the logic state of the first control signal and then, after a second delay that is different from the first delay, to change the logic state of the second control signal in response to the MTCMOS device entering an active mode. Related methods also are provided.
REFERENCES:
patent: 5933384 (1999-08-01), Terada et al.
patent: 5978948 (1999-11-01), Ohta
patent: 6140836 (2000-10-01), Fujii et al.
patent: 6433584 (2002-08-01), Hatae
patent: 6639455 (2003-10-01), Mizuno
patent: 7080270 (2006-07-01), Yokozeki et al.
Kumagi et al.,A Novel Powering-down Scheme for Low Vt CMOS Circuits, 1998 Symposium on VLSI Circuits Digest of Technical Papers, 1998, pp. 44-45, no month.
Makino et al.,An Auto-Backgate-Controlled MT-CMOS Circuit, 1998 Symposium on VLSI Circuits Digest of Technical Papers, 1998, pp. 42-43, no date, no month.
Mutoh et al.,1V High-Speed Digital Circuit Technology with 0.5 μm Multi-Threshold CMOS, Proceedings of the Sixth Annual IEEE International ASIC Conference and Exhibit, Sep. 27-Oct. Oct. 1993, pp. 186-189.
Mutoh et al.,1V Power Supply High-Speed Digital Circuit Technology with Multithreshold-Voltage CMOS, IEEE Journal of Solid-State Circuits, vol. 30, No. 8, Aug. 1995, pp. 847-854, no date.
Mutoh et al.,A 1-V Multithreshold-Voltage CMOS Digital Signal Processor for Mobile Phone Application, IEEE Journal of Solid-State Circuits, vol. 31, No. 11, Nov. 1996, pp. 1795-1802, no date.
Shigematsu et al.,A 1-V high-speed MTCMOS circuit scheme for power-down applications, 1995 Symposium on VLSI Circuits Digest of Technical Papers, 1995, pp. 125-126, no date & no month.
Shigematsu et al.,A 1-V High-Speed MTCMOS Circuit Scheme for Power-Down Application Circuits, IEEE Journal of Solid-State Circuits, vol. 32, No. 6, Jun. 1997, pp. 861-869, no date.
Myers Bigel & Sibley Sajovec, PA
Samsung Electronics Co,. Ltd.
Tan Vibol
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