Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2007-06-12
2007-06-12
Perveen, Rehana (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S401000, C713S503000
Reexamination Certificate
active
10799408
ABSTRACT:
Circuits, methods, and apparatus that prevent control signals from changing state while the control signals are being used to delay a read strobe signal. An exemplary embodiment of the present invention provides a control circuit that provides a plurality of control bits to a delay line, where the delay line delays or phase shifts a read strobe signal a duration, where the duration depends on the state of the control bits. The delayed read strobe signal is used to clock one or more data registers. To avoid undesired changes in the duration that the read strobe signal is delayed, the control bits are retimed before being provided to the delay line. A specific embodiment waits for an edge of the strobe signal to be output by the delay line before providing the control bits to the delay line. Another specific embodiment waits until no edge of the strobe signal is being delayed by the delay line before providing the control bits to the delay line.
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Chong Yan
Huang Joseph
Pan Philip
Sung Chiakang
Altera Corporation
Perveen Rehana
Stoynov Stefan
Zigmant J. Matthew
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