Context-based operation reconfigurable instruction set...

Details Context-based operation reconfigurable instruction set... Context-based operation reconfigurable instruction set...

2005-05-06

2010-02-23

Tsai, Henry W. H. (Department: 2184)

Electrical computers and digital data processing systems: input/

Intrasystem connection

System configuring

C712S227000, C712S032000, C712S037000, C455S418000, C713S310000, C713S100000

Reexamination Certificate

active

07668992

ABSTRACT:
A reconfigurable context-based operation instruction set processor for use in a processing system capable of executing a first instruction set. The reconfigurable context-based operation instruction set processor comprises: 1) a reconfigurable data path comprising a plurality of reconfigurable functional blocks; and 2) a programmable finite state machine capable of controlling the reconfigurable data path. The programmable finite state machine is capable of executing a first plurality of context-related instructions that are a first subset of the first instruction set.

REFERENCES:
patent: 5892966 (1999-04-01), Petrick et al.
patent: 2004/0063425 (2004-04-01), Wakutsu et al.
patent: 2004/0139428 (2004-07-01), Chuang et al.
patent: 2004/0224647 (2004-11-01), Ma et al.
patent: 2004/0242261 (2004-12-01), Fette
patent: 2005/0039185 (2005-02-01), Heidari-Bateni et al.
patent: 2005/0097306 (2005-05-01), Gajski
patent: 2005/0256969 (2005-11-01), Yancey et al.
patent: 2006/0211387 (2006-09-01), Pisek et al.
patent: 2007/0054662 (2007-03-01), Dillinger et al.
Wai-Kwong Lee et al., Finite State Machine Partitioning for Low Power, IEEE,1999.
Kentaro Ikemoto et al., Adaptive Channel Coding Schemes Using Finite State Machine for Software Defined Radio, IEEE, 2002.
Jorg Brakensiek et al., Software Radio Approach for Re-Configurable Miltu-Standard Radios, IEEE, 2002.
Chow et al. Low Power Realization of Finite State Machines—A Decomposition Approach, ACM Transaction on Design Automation of Electronic Systems, vol. 1, No. 3, Jul. 1996, pp. 315-340.
Benini et al. Automatic Synthesis of Low-Power Gated-Clock Finite-State Machines, IEEE Transactions on Computer-Aided Design of Intergrated Circuits and Systems, vol. 15, No. 6, Jun. 1996, pp. 630-643.
Monterio et al. Finite State Machine Decomposition for Low Power, DAC'98, 1998, pp. 758-763.
P82B96 Dual bi-directional bus buffer, Mar. 2004, Philips, pp. 1-16.
Wolf, Computer as Components: Principles of embedded computing system design, Morgan Kaufman, 2001, pp. 453-455.

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