Contact sidewall tapering with argon sputtering

Details Contact sidewall tapering with argon sputtering Contact sidewall tapering with argon sputtering

1991-06-12

1993-04-20

Dang, Thi

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156644, 156646, 156656, 156657, 20419232, 20419235, 20419237, 437195, H01L 2100

Patent

active

052039579

ABSTRACT:
The method for making a contact opening for an integrated circuit having a feature size of about one micrometer or less is accomplished by first providing an integrated circuit structure having device elements within a semiconductor substate and multilayer insulating layers thereover. A resist masking layer is formed over the multilayer insulating layer having openings therein in the areas where the contact openings are desired. Isotropic etching is done through a desired thickness portion of multilayer insulating layer. Anisotropic etching is now done through the remaining thickness of multilayer insulating layer to the semiconductor substrate to form the desired contact opening. The resist layer is removed. The structure is subjected to an Argon sputter etching ambient to smooth the sharp corners at the upper surface of multilayer layer and the point where the isotropic etching ended and the anisotropic etching began. It is preferred that soft reactive ion etching be done for a period of less than about 30 seconds after said Argon sputter etching to reduce the increased contact resistance caused by this Argon sputter etching.

REFERENCES:
patent: 4372034 (1983-02-01), Bohr
patent: 4764245 (1988-08-01), Grewal
patent: 4807016 (1989-02-01), Douglas
patent: 4814041 (1989-03-01), Auda
patent: 4857141 (1989-08-01), Abe et al.
patent: 4902377 (1990-02-01), Berglund et al.
patent: 4931411 (1990-06-01), Tigelaar et al.
patent: 5104822 (1992-04-01), Butler

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