Contact configuration and method in dual-stress liner...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S199000, C438S233000

Reexamination Certificate

active

07727834

ABSTRACT:
A method for manufacturing a semiconductor device may comprise forming a conductive layer on a substrate, removing at least one portion of the conductive layer to form a plurality of separate conductive lines, forming a first stress-inducing layer of a first stress type on the conductive lines and the substrate, and removing a portion of the first stress-inducing layer such that a remaining portion of the first stress-inducing layer is disposed on a first subset of the conductive lines but not a second subset of the conductive lines and has a boundary disposed between two of the conductive lines. This method, along with other methods and various semiconductor devices, are described.

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Yang, et al., “Dual Stress Liner for High Performance sub 45-nnm Gate Length SOI CMOS Manufacturing”, IEEE 2004, 28.8.1-28.8.3.

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