Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Reexamination Certificate
2006-08-01
2006-08-01
Peikari, B. James (Department: 2189)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
C710S008000, C710S010000, C710S011000, C710S022000, C710S051000, C711S170000, C711S001000
Reexamination Certificate
active
07085858
ABSTRACT:
The present invention allows a user to customize the configuration sequence of a configurable system on a chip (CSoC), thereby adding considerable flexibility to the configuration process. The present invention also provides certain features, transparent to the user, which optimize system resources and ensure the correct initialization of the CSoC. The CSoC leverages an on-chip central processing unit (CPU) to control the configuration process of the configurable system logic (CSL). Advantageously, the CSL configuration memory cells as well as other programmable locations in the CSoC are addressable as part of a system bus address space. The system bus is a multi-use structure that can be used for both configuring and reading of memory cells. In this manner, the CSoC optimizes system resources.
REFERENCES:
patent: 4870302 (1989-09-01), Freeman
patent: 5140193 (1992-08-01), Freeman
patent: 5175836 (1992-12-01), Morgan
patent: RE34363 (1993-08-01), Freeman
patent: 5361373 (1994-11-01), Gilson
patent: 5402014 (1995-03-01), Ziklik et al.
patent: 5448493 (1995-09-01), Topolewski et al.
patent: 5469003 (1995-11-01), Kean
patent: 5489858 (1996-02-01), Pierce et al.
patent: 5499385 (1996-03-01), Farmwald et al.
patent: 5504439 (1996-04-01), Tavana
patent: 5600271 (1997-02-01), Erickson et al.
patent: 5668815 (1997-09-01), Gittinger et al.
patent: 5677638 (1997-10-01), Young et al.
patent: 5687325 (1997-11-01), Chang
patent: 5710891 (1998-01-01), Normoyle et al.
patent: 5774684 (1998-06-01), Haines et al.
patent: 5834947 (1998-11-01), Cedar et al.
patent: 5901295 (1999-05-01), Yazdy
patent: 5911082 (1999-06-01), Monroe et al.
patent: 5935230 (1999-08-01), Pinai et al.
patent: 5936424 (1999-08-01), Young et al.
patent: 6067615 (2000-05-01), Upton
patent: 6085317 (2000-07-01), Smith
patent: 6150836 (2000-11-01), Abbott
patent: 6154793 (2000-11-01), MacKenna et al.
patent: 6212625 (2001-04-01), Russell
patent: 6282627 (2001-08-01), Wong et al.
patent: 6347346 (2002-02-01), Taylor
patent: 6349346 (2002-02-01), Hanrahan et al.
patent: 6467009 (2002-10-01), Winegarden et al.
patent: 6624656 (2003-09-01), Fox et al.
patent: 6691266 (2004-02-01), Winegarden et al.
patent: 0062431 (1982-10-01), None
patent: 0306962 (1989-03-01), None
patent: 0361525 (1990-04-01), None
patent: WO 00/22546 (1998-10-01), None
Steve Farrer, “High Speed Numerics with the 80186/80188 and 8087,” Intel Corporation, Embedded Applications vol. 1, (1995), Application Note AP-258, pp. ix-xii and 4-1 to 4-18.
Intel Corporation, “Embedded Microprocessors: Intel386™ Processors, (1995), Intel376 Processors and Peripherals, 80186/80188 Family,” pp. ix-x and 1-1 to 1-32.
Intel Corporation, “Peripheral Components: Chip Sets, PC I/O Peripherals Memory Controllers, Keyboard Controllers, Support Peripherals,” pp. ix-xi and 1-57 to 1-247 (1995).
IBM Technical Disclosure Bulletin, vol. 26, No. 3B; Aug. 1983; pp. 1531-1532.
Fox Brian
Papaliolios Andreas
Bever Hoffman & Harms
Peikari B. James
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