Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2009-10-09
2011-11-29
Wojciechowicz, Edward (Department: 2895)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S131000, C438S132000, C438S199000, C438S275000, C438S279000, C365S145000, C365S225700
Reexamination Certificate
active
08067288
ABSTRACT:
This invention discloses a method for manufacturing a one-time programmable (OTP) memory includes a first and second MOS transistors connected in parallel and controlled by a common gate formed with a single polysilicon stripe. The method further comprises a step of implanting a drift region in a substrate region below a drain and source of the first and second MOS transistors counter doping a lightly dope drain (LDD) encompassing and surrounding a drain and a source of the first MOS transistor having a different threshold voltage than the second MOS transistor not reached by the drift region.
REFERENCES:
patent: 2006/0121666 (2006-06-01), Grutzediek et al.
Alpha & Omega Semiconductor, Ltd
Lin Bo-In
Wojciechowicz Edward
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