Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-03-21
2006-03-21
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07017128
ABSTRACT:
The present invention relates to a method for optimization of a signal wire structure, providing concurrent optimization of a plurality of wire parameters, providing a plurality of wiring solutions, wherein each of said wiring solutions produces a wiring package having different wire parameters, providing an electronic package, determining the optimal wiring solutions for said electronic package; and producing an electronic package, using the optimized wiring package solutions. The resulting apparatus is also disclosed.
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Audet Jean
Budell Timothy W.
Buffet Patrick H.
Caron Alain
International Business Machines - Corporation
Schmeiser Olsen & Watts
Siek Vuthe
Steinberg William H.
Tat Binh
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