Static information storage and retrieval – Read/write circuit
Reexamination Certificate
2006-02-14
2006-02-14
Nguyen, Viet Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
C365S154000, C365S174000, C365S188000, C365S189030
Reexamination Certificate
active
06999351
ABSTRACT:
A two-transistor SRAM cell includes a first FET. The first FET is an ultrathin FET of a first polarity type and includes a control electrode, a first load electrode and a second electrode. The first load electrode is coupled to a first control line. The SRAM cell also includes a second FET. The second FET is an ultrathin FET of a second polarity type and includes a gate, a source and a drain. The second FET source is coupled to the first FET gate. The second FET gate is coupled to the first FET drain and the second FET source is coupled to a first potential. The SRAM cell further includes a first load device that is coupled between a second potential and the first FET gate. The SRAM cell additionally includes a second load device coupled between the second FET gate and a second control line.
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Micro)n Technology, Inc.
Nguyen Viet Q.
Wells St. John P.S.
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