Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
1998-03-13
2001-05-01
Pan, Daniel H. (Department: 2783)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S110000, C710S002000
Reexamination Certificate
active
06226700
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
The following co-pending and commonly-assigned patent applications are generally related to the present application: (1) U.S. patent application Ser. No. 09/039,172, filed Mar. 13, 1998, entitled “Computer System Using An Improved Distributed DMA”, (2) ) U.S. patent application Ser. No. 09/041,529, filed Mar. 13, 1998, entitled “Computer System With Bridge Logic That Asserts A System Management Interrupt Signal When an Address is Made to a Trapped Address and Which Also Completes the Cycle to the Target Address”, (3) U.S. patent application Ser. No. 09/041,606, filed Mar. 13, 1998, entitled “Computer System With Bridge Logic That Includes An Internal Modular Expansion Bus and a Common Target Interface for Internal Target Devices”, (4) U.S. patent application Ser. No. 09/042,327, filed Mar. 13, 1998, entitled “Computer System With Enhanced Docking Support”, (5) U.S. patent application Ser. No. 09/042,038, filed Mar. 13, 1998, entitled “Computer System in an Expansion Base Using Optimized Delayed Transaction Arbitration Technique”, (6) U.S. patent application Ser. No. 09/042,326, filed Mar. 13, 1998, entitled “Computer System With Improved Transition to Low Power Operation”, (7) U.S. patent application Ser. No. 09/042,036, filed Mar. 13, 1998, entitled “Computer System With Bridge Logic That Permits Efficient Data Transfer Between a Processor, Memory Device and a Peripheral Device”, (8) U.S. patent application Ser. No. 09/042,333, filed Mar. 13, 1998, entitled “Computer System With Improved Serial Bus Scheme”; and (9) U.S. patent application Ser. No. 09/042,277, filed Mar. 13, 1998, entitled “Smart Battery Power Management in a Computer System.”
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT
Not Applicable.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to computer systems. More particularly, the present invention relates to circuitry that forms a communications “bridge” between components in a personal computer system. Still more particularly, the present invention relates to a bridge logic device that includes an internal modular expansion bus for facilitating the transfer of data between an internal master device and other computer system components operating under a different protocol.
2. Background of the Invention
A personal computer system includes a number of components with specialized functions that cooperatively interact to produce the many effects available in modern computer systems. The ability of these various components to exchange data and other signals is vital to the successful operation of a computer system. One of the critical requirements in designing a new computer system is that all system components (including those which may be added to the system by a user) must be compatible. A component is compatible if it effectively communicates and transfers data without interfering or contending with the operation of other system components. Because modern computer systems are designed with components that operate with different protocols, the likelihood that components may not properly communicate is heightened. Compatibility between devices with different protocols is achieved with bridge logic devices. As the name implies, bridge logic devices provide a communications bridge between components and busses operating under different protocols. The present invention is directed to an improved bridge logic device. Computer systems have components with different protocols because of the manner in which computers evolved, and the desire to make new computer designs backwards-compatible with prior designs. This backward compatibility insures that the user can use a peripheral device from a prior computer in a new computer system.
Early computer systems had relatively few components. As an example, some of the early computer systems included a processor (or CPU), random access memory (RAM), and certain peripheral devices such as a floppy drive, a keyboard and a display. These components typically were coupled together using a network of address, data and control lines, commonly referred to as a “bus.” As computer technology evolved, it became common to connect additional peripheral devices to the computer through ports (such as a parallel port or a serial port), or by including the peripheral device on the main system circuit board (or “motherboard”) and connecting it to the system bus.
The computer operates by having data flow through the system, with modification of the data occurring frequently. Typically, the CPU controls most of the activities of the computer system. The CPU supervises data flow and is responsible for most of the high-level data modification in the computer. The CPU, therefore, is the heart of the system and receives signals from the peripheral devices, reads and writes data to memory, processes data, and generates signals controlling the peripheral devices.
The performance of the computer system is determined only in part by the performance of the processor. Other factors also affect performance. One of the most critical factors is the bus that interconnects the various system components. The size and clock speed of the bus dictate the maximum amount of data that can be transmitted between components. One early bus that still is in use today is the ISA (Industry Standard Architecture) bus. The ISA bus, as the name implies, was a bus standard adopted by computer manufacturers to permit the manufacturers of peripheral devices to design devices that would be compatible with computer systems of most computer companies. The ISA bus includes 16 data lines and 24 address lines and operates at a clock speed of 8 MHz. A number of peripheral components have been developed over the years to operate with the ISA protocol.
Since the introduction of the ISA bus, computer technology has continued to evolve at a relatively rapid pace. New peripheral devices have been developed, and both processor speeds and the size of memory arrays have increased dramatically. In conjunction with these advances, designers have sought to increase the ability of the system bus to transfer more data at a faster speed. One way in which system bus has been made more effective is to permit data to be exchanged in a computer system without the assistance of the CPU. To implement this design, however, a new bus protocol had to be developed. One such bus that permits peripheral devices to run cycles independently of the CPU as a “master” device is the EISA (Extended Industry Standard Architecture) bus. The EISA bus enables various system components residing on the EISA bus to obtain mastership of the bus and to run cycles on the bus. Another bus that has become increasingly popular is the Peripheral Component Interconnect (PCI) bus. Like the EISA bus, the PCI bus has bus master capabilities. The PCI bus also operates at a clock speed of 33 MHz or faster.
Because of the bus mastering capabilities and other advantages of the PCI (and EISA) bus, many computer manufacturers now implement one or the other of these busses as the main system bus in the computer system. Because of the proliferation of devices that had been developed for the ISA bus, the computer manufacturers also continued to provide an ISA bus as part of the computer system to permit the use of the many peripheral devices that operated under that protocol. To further provide flexibility, some computer manufacturers provide all three busses in the same computer system to permit users to connect peripheral devices of all three protocols to the computer system. To implement these various busses in the same computer system, special bridge logic circuit has been developed to interface to the various busses.
FIG. 1
shows a representative prior art computer system that includes a CPU coupled to a bridge logic device via a CPU bus. The bridge logic device is sometimes referred to as a “North bridge” for no other reason than it often is depicted at the upper end of a computer system drawing. The North bridge also couples to the ma
Deschepper Todd
Higby Danny
Stevens Jeffrey C.
Wandler Shaun
Wilson Jeffrey T.
Compaq Computer Corporation
Conley & Rose & Tayon P.C.
Harris Jonathan M.
Heim Michael F.
Pan Daniel H.
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