Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
Reexamination Certificate
2001-06-15
2002-05-28
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having schottky gate
C438S572000, C438S574000, C438S576000
Reexamination Certificate
active
06395588
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a compound semiconductor device and a method of manufacturing the same and, more particularly, a compound semiconductor device having a Schottky gate such as a high electron mobility transistor, a metal semiconductor field effect transistor, etc. and a method of manufacturing the same.
2. Description of the Prior Art
As a compound semiconductor device having a Schottky gate, there have been known a high electron mobility transistor (HEMT), a metal semiconductor field effect transistor (MESFET), and the like.
In such compound semiconductor devices, reduction in an influence of surface states upon a surface depletion layer and control of a threshold voltage of a transistor have been achieved by providing a recessed structure in a compound semiconductor layer which is located in a gate electrode connection portion and its peripheral area.
The field effect transistor employing the recessed structure has been set forth in, e.g., {circle around (1)} IEEE MTT-S Digest (1997) pp 1187-1190, {circle around (2)} IEEE MTT-S Digest (1998) pp 439-442, {circle around (3)} Patent Application Publication (KOKAI) Hei 5-129341, {circle around (4)} Patent Application Publication (KOKAI) Hei 5-251471, {circle around (5)} Patent Application Publication (KOKAI) Hei 9-8283, and the like.
For example, the HEMT set forth in the reference {circle around (1)} has a structure shown in FIG.
1
.
In
FIG. 1
, an undoped AlGaAs buffer layer
102
, an n
+
-AlGaAs first electron supply layer
103
, an undoped AlGaAs first spacer layer
104
, an undoped InGaAs channel layer
105
, an undoped AlGaAs second spacer layer
106
, an n
+
-AlGaAs second electron supply layer
107
, an undoped AlGaAs Schottky layer
108
, an n
−
-GaAs intermediate layer (buried layer)
109
, and an n
+
-GaAs cap layer
110
are formed in sequence on a semi-insulating GaAs substrate
101
. An AlGaAs layer
111
is formed between the n
+
-GaAs cap layer
110
and the n
−
-GaAs intermediate layer
109
.
A first recess
112
is formed in the cap layer
110
to expose the intermediate layer
109
in the periphery of a gate region. In addition, a second recess
114
is formed in the intermediate layer
109
to bury a lower portion of a gate electrode
113
made of tungsten silicide (WSi). The first recess
112
and the second recess
114
are formed to adjust a depth of a surface depletion layer.
A gold (Au) layer
115
is connected to the gate electrode
113
to reduce its resistance value.
The cap layer
110
is separated into a source side and a drain side on both sides of the gate electrode
113
by the first recess
112
. A source electrode
116
s
and a drain electrode
116
d
, both being ohmic-connected to the cap layer
110
, are formed on the cap layer
110
which has remained on the source side and the drain side respectively. In this case, a distance L from an edge of the first recess
112
to an edge of the second recess
114
between the drain electrode
116
d
and the gate electrode
113
is referred to as a recess length hereinafter.
In such HEMT, carriers supplied from the drain electrode
116
d
come up to the channel layer
105
via the cap layer
110
, . . . , the second spacer layer
106
, etc. Then, the carriers travel in the channel layer
105
from the lower side of the drain electrode
116
d
to the lower side of source electrode
116
s
by the electric field. Then, the carriers come up to the source electrode
116
s
via the second spacer layer
106
, . . . , the cap layer
110
. Travel of the carriers in the channel layer
105
can be controlled by a depletion layer which spreads out from the gate electrode
113
when voltage is applied.
By the way, in the HEMT having the above structure, a sufficient gate breakdown voltage has not been able to be achieved since, if the backward bias voltage is applied to the gate electrode
113
, a phenomenon that a leakage current is increased gradually with the lapse of application time, i.e., a walk-out phenomenon, is caused.
Moreover, control of the gate forward bias has not been able to be sufficiently performed.
Besides, the fact that, if the recess length is less than 1 &mgr;m, a high power added efficiency cannot be maintained has been confirmed according to the experiment done by the inventors of the present invention.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a compound semiconductor device which is capable of improving a breakdown voltage while suppressing generation of a walk-out phenomenon and also maintaining a high power added efficiency even if a recess length in a region between a gate electrode and a cap layer is set to 1 &mgr;m or less, and a method of manufacturing the same.
(1) The above problems can be overcome by providing a compound semiconductor device which comprises a channel layer formed on a compound semiconductor substrate, and formed of material which has a first donor concentration and a first bandgap; a carrier supply layer formed on the channel layer, and formed of material which has a second donor concentration being higher than the first donor concentration and a second bandgap being wider than the first bandgap; a first compound semiconductor layer formed on the carrier supply layer, and containing donors in at least one of a lower layer portion and an upper layer portion within a range of impurity concentration of 1×10
16
to 1×10
17
atoms/cm
3
; a gate electrode connected to the first compound semiconductor layer; a cap layer formed on the first compound semiconductor layer in a source region and a drain region which arc formed on both sides of the gate electrode, and formed of material which has a third donor concentration being higher than the first donor concentration and a third bandgap being narrower than the second bandgap; a source electrode at least a part of which is formed on the cap layer in the source region; and a drain electrode at least a part of which is formed on the cap layer in the drain region.
According to the compound semiconductor device of the present invention, the first compound semiconductor layer whose donor concentration is set to 1×10
16
atoms/cm
3
to 1×10
17
atoms/cm
3
is provided between the cap layer and the carrier supply layer.
According to the donor of such concentration, the holes being separated in the channel layer can be prevented from reaching the surface of the first compound semiconductor layer, whereby contraction of the surface depletion layer can be suppressed and thus generation of the walk-out phenomenon can be prevented.
In this case, since the donor concentration is set to less than 1×10
17
atoms/cm
3
, the situation that the gate breakdown voltage is easily reduced because of high concentration of donor in the first compound semiconductor layer cannot be brought about.
(2) The above problems can be overcome by providing a compound semiconductor device which comprises a channel layer formed on a compound semiconductor substrate, and formed of material which has a first donor concentration and a first bandgap; a carrier supply layer formed on the channel layer, and formed of material which has a second donor concentration being higher than the first donor concentration and a second bandgap being wider than the first bandgap; a Schottky layer formed on the carrier supply layer, and formed of material which has a third bandgap being wider than the second bandgap; a gate electrode connected to the Schottky layer; a buried layer having a recess in which a part of the gate electrode is buried; a cap layer formed on the Schottky layer in a source region and a drain region which are formed on both sides of the gate electrode, and formed of material which has a third donor concentration being higher than the first donor concentration and a fourth bandgap being narrower than the second bandgap; a source electrode at least a part of which is formed on the cap layer in the source region; and a drain electrode at least
Arimochi Kenji
Igarashi Tsutomu
Kuroda Shigeru
Mitani Eizo
Nikaido Junichiro
Armstrong Westerman & Hattori, LLP
Fujitsu Quantum Devices Limited
Picardat Kevin M.
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