Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Reexamination Certificate
2005-03-15
2005-03-15
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
Reexamination Certificate
active
06867115
ABSTRACT:
The conventional compound semiconductor switching device is prone to have a large chip size as the gate width needs to be large for achieving a low insertion loss and the separation between the connecting pad and the circuit wiring needs to be larger than 20 μm for obtaining a proper isolation between them. The overall chip size is reduced, first, by reducing the gate width of the switching FET operating at frequencies above 2.4 GHz to 700 μm or smaller together with the omission of the shunt FET, and, then, by reducing the separation between the connecting pad and the circuit wiring to 20 μm or smaller. This reduction of the separation is made possible by the introduction of an insulating film and a impurity region between the outermost portion of the connecting pad and the substrate for preventing the extension of the depletion layer. The manufacturing method of this device does not need any additional processing step for accommodating the above structure, and is capable of producing a device having a size of one fifth of the conventional device.
REFERENCES:
patent: 5324969 (1994-06-01), Murai et al.
patent: 5508210 (1996-04-01), Terazono
patent: 5548239 (1996-08-01), Kohama
patent: 5552335 (1996-09-01), Mahon et al.
patent: 5861656 (1999-01-01), Keri
patent: 5949140 (1999-09-01), Nishi et al.
patent: 6153488 (2000-11-01), Yoshino
patent: 6329677 (2001-12-01), Oguri et al.
patent: 6683380 (2004-01-01), Efland et al.
patent: 6-29811 (1994-02-01), None
patent: 6-334506 (1994-12-01), None
patent: 7-303001 (1995-11-01), None
patent: 8-70245 (1996-03-01), None
patent: 8-195667 (1996-07-01), None
patent: 8-204528 (1996-08-01), None
patent: 8-204530 (1996-08-01), None
patent: 8-213891 (1996-08-01), None
patent: 2-557561 (1996-09-01), None
patent: 8-293776 (1996-11-01), None
patent: 9-55682 (1997-02-01), None
patent: 63-20041 (1998-04-01), None
CompactGaAs ICs For PHS, Kaoru Nogawa et al. Sanyo Technical Review vol. 29, No.1 Apr. 1997. pp52-59.
High Power DPDT Antenna Switch MMIC For Digital Cellular Systems, Kazumasa Kohama et al. IEEE Journal of Solid-State Circuits, vol. 31, No. 10, Oct. 1996.
High Power Handling GaAs SWIC For GSM Application, Noriyuki Ohbata et al. NEC Kansai Ltd. vol. 52 No. Mar. 1999. pp150-152.
Asano Tetsuro
Higashino Takayoshi
Hirai Toshikazu
Hirata Koichi
Sakakibara Mikito
Dolan Jennifer M.
Jr. Carl Whitehead
Morrison & Foerster / LLP
Sanyo Electric Co,. Ltd.
LandOfFree
Compound semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Compound semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Compound semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3382964