Composite spacer liner for improved transistor performance

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S265000

Reexamination Certificate

active

06949436

ABSTRACT:
Semiconductor devices with improved transistor performance are fabricated by forming a composite oxide
itride liner under a gate electrode sidewall spacer. Embodiments include depositing a conformal oxide layer by decoupled plasma deposition, depositing a conformal nitride layer by decoupled plasma deposition, depositing a spacer layer and then etching.

REFERENCES:
patent: 5783475 (1998-07-01), Ramaswami
patent: 6057243 (2000-05-01), Nagayama
patent: 6143613 (2000-11-01), Lin
patent: 6235597 (2001-05-01), Miles
patent: 6316304 (2001-11-01), Pradeep et al.
patent: 6506650 (2003-01-01), Yu
patent: 6521529 (2003-02-01), Ngo et al.

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