Completely decoupled high voltage and low voltage transistor...

Details Completely decoupled high voltage and low voltage transistor... Completely decoupled high voltage and low voltage transistor...

2007-03-27

2010-11-02

Fahmy, Wael M (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S427000, C438S207000, C438S353000, C438S294000, C438S232000, C438S341000, C438S261000, C257S500000, C257SE29125, C257SE29131, C257SE29134, C257SE29275, C257SE29319

Reexamination Certificate

active

07824977

ABSTRACT:
A semiconductor wafer includes at least a partially manufactured high voltage transistor covered by a high-voltage low voltage decoupling layer and at least a partially manufactured low voltage transistor with the high-voltage low-voltage decoupling layer etched off for further performance of a low-voltage manufacturing process thereon. The high-voltage low-voltage decoupling layer comprising a high temperature oxide (HTO) oxide layer of about 30-150 Angstroms and a low-pressure chemical vapor deposition (LPCVD) nitride layer.

REFERENCES:
patent: 6177362 (2001-01-01), Huang et al.
patent: 6828183 (2004-12-01), Sung et al.
patent: 2005/0059215 (2005-03-01), Kim et al.

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