Complementary FET drivers for programmable memories

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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307238, 307279, 307DIG1, 365 94, 365 96, G11C 700

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active

041225473

ABSTRACT:
A memory having a P channel device for each storage element, complementary FET inverters as row drivers for reading and complementary FET devices connected in series as column drivers for reading. A P channel device and a resistor are connected to the source and drain of the N channel device of the row driver and a P channel device is provided as a column driver for the high writing or programming potential. The series P channel device of the column read driver is switched off during writing.

REFERENCES:
patent: 3703711 (1972-11-01), Duben
patent: 3986054 (1976-10-01), Hansen et al.
patent: 4037217 (1977-07-01), Savarese
patent: 4063225 (1977-12-01), Stewart
patent: 4075690 (1978-02-01), Oberman et al.
patent: 4078261 (1978-03-01), Millhollan et al.
R. D. Lohman, "Applications of Mos FET's in Micro-Electronics", Mar. 1966, pp. 23-29.

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