Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-03-22
2005-03-22
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000
Reexamination Certificate
active
06869840
ABSTRACT:
Electrostatic discharge (ESD) protection structures utilizing bipolar conduction are disclosed. The structures each include a parasitic p-n-p bipolar transistor (102); some of the disclosed embodiments include this transistor within a silicon-controlled-rectifier (SCR) type of ESD protection structure. A p+ doped region (116, 216, 316, 416, 516) is disposed at a surface of an n-well (112, 212, 312, 412, 512) overlying a location (115, 215, 315, 415, 515) that receives both the n-well (112, 212, 312, 412, 512) implants and also the p-well (213, 313, 413, 513) implants. Preferably, the well implants are designed to provide retrograde doping profiles. The number of net impurities is reduced, and thus the base Gummel number is lowered, at the compensated well portion (112′, 212′, 312′, 412′, 512′), resulting in improved gain for the vertical bipolar device.
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Chatterjee Amitava
Kunz Keith E.
Brady III W. James
Garner Jacqueline J.
Pham Long
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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