Compact ROM with reduced access time

Details Compact ROM with reduced access time Compact ROM with reduced access time

1982-06-01

1984-10-30

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365230, 365104, G11C 1140

Patent

active

044803206

ABSTRACT:
Access time is reduced by isolating the relatively high impedance stack, formed of series connected driver transistors, from a relatively high capacitive output. The driver transistors are either enhancement mode or depletion mode transistors, depending upon the information to be represented thereby. An isolation transistor has its control terminal connected to the stack through a control node and its output circuit connected between the output node and ground. The output node is connected through a load to a positive voltage. A switched ground technique is used to charge the control node prior to addressing. During readout, if any of the series connected driver transistors in the selected stack are not rendered conductive, due to the level of the address signals applied thereto, the control node remains charged causing the isolation transistor to remain conductive and the output node is thus discharged. To increase density, multiple stacks are connected in parallel to a single isolation transistor.

REFERENCES:
patent: 4344156 (1982-08-01), Eaton, Jr. et al.

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