Compact register set using a psram array

Details Compact register set using a psram array Compact register set using a psram array

1987-09-29

1989-09-26

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36523008, 365233, G11C 700

Patent

active

048706167

ABSTRACT:
A compact register file circuit, especially valuable for CMOS VLSI circuits used with microcontrollers, which uses a pseudo static random access memory array circuit, a latch array circuit, and a decoder circuit to provide almost identical characteristics as available with a much larger static random access memory as a register set. The only differences visible to the user during a read operation is the requirement of keeping the address data value constant during the active portion of the pseudo static random access memory chip select waveform.

REFERENCES:
patent: 4500974 (1985-02-01), Nagami
patent: 4586166 (1986-04-01), Shah
patent: 4636985 (1987-01-01), Aoki et al.
patent: 4651237 (1987-03-01), Williams
patent: 4809233 (1989-02-01), Takimae

Affiliated with

Also associated with

Rating

Compact register set using a psram array does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Compact register set using a psram array, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Compact register set using a psram array will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-192681