Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral monitoring
Reexamination Certificate
2011-04-05
2011-04-05
Tsai, Henry W (Department: 2184)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral monitoring
C714S048000, C714S052000
Reexamination Certificate
active
07921234
ABSTRACT:
In a communications channel coupled to multiple duplicated subsystems, a method, interposer and program product are provided for verifying integrity of subsystem responses. Within the communications channel, a first checksum is calculated with receipt of a first response from a first subsystem responsive to a common request, and a second checksum is calculated for a second response of a second subsystem received responsive to the common request. The first checksum and the second checksum are compared, and if matching, only one of the first response and the second response is forwarded from the communications channel as the response to the common request, with the other of the first response and the second response being discarded by the communications channel.
REFERENCES:
patent: 5421006 (1995-05-01), Jablon et al.
patent: 5539879 (1996-07-01), Pearce et al.
patent: 5649089 (1997-07-01), Kilner
patent: 5765172 (1998-06-01), Fox
patent: 5778206 (1998-07-01), Pain et al.
patent: 5953352 (1999-09-01), Meyer
patent: 5991774 (1999-11-01), Tate et al.
patent: 6088330 (2000-07-01), Bruck et al.
patent: 6609165 (2003-08-01), Frazier
patent: 6668352 (2003-12-01), Jung
patent: 6674715 (2004-01-01), Yamada
patent: 6687766 (2004-02-01), Casper et al.
patent: 6993352 (2006-01-01), Lundby
patent: 7231564 (2007-06-01), Loaiza et al.
patent: 7293044 (2007-11-01), Ghotge et al.
patent: 7516246 (2009-04-01), Condorelli et al.
patent: 2002/0057688 (2002-05-01), Hamasaki et al.
patent: 2002/0091883 (2002-07-01), Beardsley et al.
patent: 2004/0042494 (2004-03-01), Chen et al.
patent: 2004/0054956 (2004-03-01), Byrd
patent: 2004/0081087 (2004-04-01), Shea
patent: 2004/0100966 (2004-05-01), Allen, Jr. et al.
patent: 2006/0179483 (2006-08-01), Rozas
patent: 2004120190 (2004-04-01), None
patent: 2002033227 (2002-05-01), None
patent: 98/12657 (1998-03-01), None
“Diagnostic Wrap Using Cyclic Redundancy Checking,” J.C. Elliott, IBM Technical Disclosure Bulletin, vol. 20, No. 3, Aug. 1977, p. 1041.
“Logic Redundancy Cross Checking for Memory,” IBM Technical Disclosure Bulletin, vol. 33, No. 10B, Mar. 1991, pp. 147-148.
“Embedding a Secondary Communication Channel Transparently Within a Cyclic Redundancy Check (RCR),” D.R. Irvin, IBM Res. & Dev., vol. 45, No. 6, Nov. 2001, pp. 789-796.
Office Action for U.S. Appl. No. 12/260,285 (U.S. Letters Patent No. 7,516,246 B2), dated Dec. 18, 2007.
Office Action for U.S. Appl. No. 12/260,285 (U.S. Letters Patent No. 7,516,246 B2), dated Jun. 20, 2008.
Condorelli Vincenzo
Dewkett Thomas J.
Hocker Michael D.
Visegrady Tamas
Chiu, Esq. Steven
Heslin Rothenberg Farle & Mesiti P.C.
International Business Machines - Corporation
Radigan, Esq. Kevin P.
Sun Michael
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