Command decoding system and method of decoding a command...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying

Reexamination Certificate

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Details

C005S032100, C005S034000, C711S103000, C711S125000, C711S137000

Reexamination Certificate

active

07730234

ABSTRACT:
A command decoding system includes a main processor, an instruction memory, a memory controller, and a device controller. The main processor provides a command, and the instruction memory stores an instruction block corresponding to the command. The instruction block includes micro-commands for executing the command. The memory controller controls an access to the instruction memory, and the device controller receives the command, and sequentially fetches the micro-commands included in the instruction block corresponding to the command through the memory controller to execute the fetched micro-commands.

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patent: 1020040021043 (2004-03-01), None
patent: 1020050035836 (2005-04-01), None

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