Combined precharging and homogenizing circuit

Static information storage and retrieval – Read/write circuit – Precharge

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365204, 36518525, G11C 700

Patent

active

060814691

ABSTRACT:
A combined precharging and homogenizing circuit for a semiconductor memory configuration made up of a memory cell array having a multiplicity of bit line pairs. The combined precharging and homogenizing circuit containing a first and a second field-effect precharging transistor and a homogenizing transistor connected in series between the two precharging transistors. Gates of the two precharging transistors and of the homogenizing transistor are connected together to form a common gate. Sources of the precharging transistors are connected together to form a common source. A drain of the first precharging transistor and a drain of the homogenizing transistor are connected together to form a common drain and the source of the homogenizing transistor and the drain of the second precharging transistor are connected together to form a common source/drain. In the combined precharging and homogenizing circuit, the invention provides that the common gate is angled and is configured rotated through about 45.degree. in relation to a longitudinal direction of the bit lines. In addition, the common drain and the common source/drain are drawn forward beyond the common gate defining protruding regions, and that bit line contacts are accommodated in the protruding regions.

REFERENCES:
patent: 4570083 (1986-02-01), Nakaizumi
patent: 5604365 (1997-02-01), Kajigaya
patent: 5652726 (1997-07-01), Tsukude
patent: 5986955 (1999-11-01), Siek et al.
patent: 5995434 (1999-11-01), Ryu

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