Combination column redundancy system for a memory array

Details Combination column redundancy system for a memory array Combination column redundancy system for a memory array

2007-07-31

2007-07-31

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S230030, C365S230060

Reexamination Certificate

active

11195878

ABSTRACT:
A column redundancy system combining at least two different redundancy systems to provide local redundant memory and shared redundant memory. The column redundancy system includes a plurality of sets of local redundant columns memory, each set of local redundant columns of memory is associated with a corresponding one of a plurality of memory sub-arrays. The columns of memory of the sets of local redundant columns of memory are adapted to replace defective columns of memory of the respective memory sub-arrays. The column redundancy system further includes columns of shared redundant memory that are adapted to replace defective columns of memory of the plurality of memory sub-arrays.

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