Column selectable self-biasing virtual voltages for SRAM...

Static information storage and retrieval – Read/write circuit – Particular write circuit

Reexamination Certificate

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C365S154000, C365S156000, C365S189090, C365S189110

Reexamination Certificate

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07817481

ABSTRACT:
A static random access memory decoder circuit includes a first cell supply line coupled to provide a first column of memory cells a first cell supply voltage and a second cell supply line coupled to provide a first column of memory cells a first cell supply voltage. The decoder circuit further includes a write assist circuit having a first threshold transistor coupled to the first cell supply line and a second threshold transistor coupled to the second cell supply line. In response to a write assist signal, the write assist circuit connects one of the first and second cell supply lines selected by control circuitry to an associated one of the first and second threshold transistors, such that a cell supply voltage of the selected one of the first and second cell supply lines is reduced toward the threshold voltage of the threshold transistor.

REFERENCES:
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patent: 7079426 (2006-07-01), Zhang et al.
patent: 7643357 (2010-01-01), Braceras et al.
patent: 2007/0030741 (2007-02-01), Nii et al.
patent: 2007/0236983 (2007-10-01), Wang et al.
patent: 2007/0263447 (2007-11-01), Koike et al.
patent: 2009/0207675 (2009-08-01), Kengeri et al.
patent: 2009/0251984 (2009-10-01), Jung et al.
patent: 2009/0285039 (2009-11-01), Adams et al.

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