Column select signal control circuits and methods for integrated

Details Column select signal control circuits and methods for integrated Column select signal control circuits and methods for integrated

1996-11-12

1998-09-22

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Signals

365193, G11C 700

Patent

active

058124640

ABSTRACT:
Column select circuits and methods for read/write memory devices logically combine and delay an enable signal and a read/write control signal, to produce a column select control signal which has a first enable interval during a read operation and a second enable interval during a write operation. The first enable interval is preferably shorter than the second enable interval. The column select control signal preferably ends at the same time for both the read and write operations, but begins at different times for the read and write operations. Accordingly, the enable interval for the control signal can be different during read and write operations, to allow sufficient time for each of these operations while increasing access speed and preventing errors.

REFERENCES:
patent: 5319253 (1994-06-01), You
patent: 5357479 (1994-10-01), Matsui
patent: 5379261 (1995-01-01), Jones, Jr.
patent: 5384745 (1995-01-01), Konishi et al.
patent: 5386385 (1995-01-01), Stephens, Jr.
patent: 5521879 (1996-05-01), Takasugi
patent: 5550784 (1996-08-01), Takai

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