Column redundancy circuit and method of semiconductor memory dev

Static information storage and retrieval – Read/write circuit – Bad bit

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

3652257, 36523006, 365 96, G11C 700, G11C 800, G11C 1700

Patent

active

056216912

ABSTRACT:
A column redundancy circuit and method of a semiconductor memory device. The column redundancy circuit comprises a programming element for programming a repair column address; a comparing element for comparing the programmed repair column address with a column address inputted from outside to thereby generate a redundancy enable control signal according to result of the comparison; a decoding element for decoding the repair column address signal to thereby generate a decoding signal; and a redundancy column select element for compounding the decoding signal and a data input signal to thereby enable a redundancy column select signal.

REFERENCES:
patent: 4829480 (1989-05-01), Seo
patent: 5297085 (1994-03-01), Choi et al.
patent: 5325334 (1994-06-01), Roh et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Column redundancy circuit and method of semiconductor memory dev does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Column redundancy circuit and method of semiconductor memory dev, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Column redundancy circuit and method of semiconductor memory dev will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-366695

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.