Column decoder discharge for semiconductor memory

Static information storage and retrieval – Read/write circuit – Precharge

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G11C 702

Patent

active

043274269

ABSTRACT:
A random access read/write MOS memory device employs an array of rows and columns of memory cells which are accessed by an address input applied to row and column decoders. To avoid unwanted trapping of voltages on unselected column decoder outputs, the circuitry of the invention provides positive discharge of nodes which should not maintain voltage thereon.

REFERENCES:
patent: 4063118 (1977-12-01), Nishimura
patent: 4074148 (1978-02-01), Sato
patent: 4144590 (1979-03-01), Kitagawa et al.
patent: 4200917 (1980-04-01), Moench

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