Column and ground select sequence in electrically programmable m

Static information storage and retrieval – Read/write circuit – Precharge

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365185, 365230, G11C 1140, G11C 700

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active

043874479

ABSTRACT:
An electrically programmable memory array having rows and columns of floating gate type memory cells employs alternate output lines and ground lines between the columns of cells, providing a virtual ground arrangement. A row is selected by one part of an address input, and a column selected by another part. An output line on one side of the selected column is activated, and a ground line on the other side. A differential sense amplifier is responsive to the voltage on the selected output line and a reference voltage. To speed up the access time of the memory, the ground select is implemented and applied first, then the output of the ground select is used to generate the column select. In this manner, the biasing sequence for the array can begin before the decode of the column select has been completed.

REFERENCES:
patent: 3934233 (1976-01-01), Fisher et al.
patent: 4173791 (1979-11-01), Bell
patent: 4301518 (1981-11-01), Klaas

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