Column address strobe signal generator for synchronous dynamic r

Details Column address strobe signal generator for synchronous dynamic r Column address strobe signal generator for synchronous dynamic r

1997-04-04

2000-08-22

Dinh, Son T.

Static information storage and retrieval

Read/write circuit

Signals

36523003, G11C 700

Patent

active

061082481

ABSTRACT:
A column address strobe signal generator for a synchronous dynamic random access memory with at least two internal banks, comprising a column address strobe signal active input stage for allowing a column address strobe signal to enter an active state, a column address strobe signal precharge input stage for allowing the column address strobe signal to enter a precharge state, and a bank select address input stage for selecting an external bank select address signal when a test mode signal is at an inactive state and an internal bank select address signal from a refresh counter when the test mode signal is at an active state, to allow a bank specified by the column address strobe signal to be the same as that specified by a row address strobe signal in a test mode where the refresh counter is tested, the internal bank select address signal being one of row addresses from the refresh counter. According to the present invention, the column address strobe signal generator can solve discordance between bank select addresses when the row address strobe signal and column address strobe signal are generated in the test mode operation of the SDRAM.

REFERENCES:
patent: 5471430 (1995-11-01), Sawada et al.
patent: 5583823 (1996-12-01), Park
patent: 5652856 (1997-07-01), Santeler et al.
patent: 5895481 (1999-04-01), Yap
patent: 5926827 (1999-07-01), Dell et al.

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