Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate
2005-02-01
2005-02-01
Peikari, B. James (Department: 2186)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output access regulation
C710S055000, C370S412000, C370S413000, C712S210000, C711S208000
Reexamination Certificate
active
06850999
ABSTRACT:
A coherency resolution technique enables efficient resolution of data coherency for packet data associated with a service queue of an intermediate network node. The packet data is enqueued on a write buffer prior to being stored on an external packet memory of a packet memory system. The packet data may be interspersed among other packets of data from different service queues, wherein the packets are of differing sizes. In response to a read request for the packet data, a coherency operation is performed by coherency resolution logic on the data in the write buffer to determine if any of its enqueued data can be used to service the request.
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Mak Kwok Ken
Sun Xiaoming
Cesari and McKenna LLP
Cisco Technology Inc.
Johnston A. Sidney
Peikari B. James
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