4. Image analysis
  5. Pattern recognition
  6. Classification

A. Sidney Johnston

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Adaptive timer for LLC type 2 reliable transport in a...

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data transfer regulating
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Architecture for a processor complex of an arrayed pipelined...

Electrical computers and digital processing systems: processing – Processing architecture – Array processor
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Coherency coverage of data across multiple packets varying...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
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Computer system and method for characterizing and...

Electrical computers and digital processing systems: multicomput – Distributed data processing
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Concentrated parity technique for handling double failures...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Profile ID: LFUS-PAI-P-2017332

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