Code size reduction method through multiple load/store...

Details Code size reduction method through multiple load/store... Code size reduction method through multiple load/store...

2005-07-27

2009-02-17

Elmore, Reba I (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Memory configuring

C711S152000, C711S157000

Reexamination Certificate

active

07493463

ABSTRACT:
A method to transfer a plurality of data stored in a memory using one instruction. In a memory including at least two regions to which the addresses are assigned respectively, data are allocated to the addresses in sequence, and the allocated data are transferred using one instruction. At least one block is generated, which transfers data using one instruction, and it is instructed to include the data in the at least one block. The data in the block are linked with each other, and the number of paths linking two data is calculated with respect to the at least one block. The data are linked using shortest paths in consideration of the number of the linking paths, and the data are allocated by the addresses using the shortest paths.

REFERENCES:
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patent: 5991815 (1999-11-01), Prater et al.
patent: 2002/0156914 (2002-10-01), Lo et al.
patent: 2005/0069314 (2005-03-01), De Patre et al.

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