Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1999-06-02
2000-07-04
Quach, T. N.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438592, 438649, 438683, 438902, H01L 213205
Patent
active
060838175
ABSTRACT:
A substantially inert capping layer of tungsten nitride is deposited on cobalt layers prior to silicidation, thereby avoiding any substantial interaction with cobalt. The tungsten nitride capping layer also functions as a diffusion barrier preventing oxygen from reaching the silicidation area. The resulting cobalt silicides layer exhibit lower resistivity than those formed employing a titanium capping layer. Embodiments include rapid thermal annealing to initially form a layer of cobalt monosilicide consuming a portion of the cobalt layer, removing the tungsten nitride and unreacted cobalt layer, and rapid thermal annealing again to convert the cobalt monosilicide layer to a low resistivity layer of cobalt disilicide.
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Chen Robert
Morales Guarionex
Nogami Takeshi
Advanced Micro Devices , Inc.
Quach T. N.
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