CMOS semiconductor devices and method of formation

Details CMOS semiconductor devices and method of formation CMOS semiconductor devices and method of formation

1998-06-30

2000-02-22

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438584, 438592, H01L 218238

Patent

active

060279613

ABSTRACT:
In one embodiment, a metal layer (18) is formed over a gate dielectric layer (14, 16) on a semiconductor substrate. A masking layer (20) is patterned to mask a portion of the metal layer (18). An exposed portion of the metal layer (18) is nitrided to form a conductive nitride layer (24). The masking layer (20) is removed and the conductive nitride layer (24) is patterned to form a first gate electrode (23) having a first work function value, and the conductive layer (18) is patterned to form a second gate electrode (25) having a second work function value which is different from that of the first work function value.

REFERENCES:
patent: 4605947 (1986-08-01), Price et al.
patent: 5268590 (1993-12-01), Pfiester et al.
patent: 5457580 (1995-10-01), Lu et al.
patent: 5600169 (1997-02-01), Burgener et al.
patent: 5923999 (1999-07-01), Balasubramanyam et al.

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