CMOS semiconductor device with an element isolating field shield

Details CMOS semiconductor device with an element isolating field shield CMOS semiconductor device with an element isolating field shield

1991-02-19

1992-11-17

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257394, 257630, H01L 2906, H01L 2978, H01L 2986

Patent

active

051648032

ABSTRACT:
A semiconductor device comprises an MOSFET (13) comprising a switching gate electrode (5) and a field shield MOS structure (11) formed on an element isolating region of a semiconductor substrate (1) and performs the element isolation by applying a bias voltage to the field shield (9). The field shield (9) is provided on the element isolating region of the semiconductor substrate (1) through an insulating film (8). A sidewall spacer (12) having its width set such that the field shield (9) may be an offset gate is formed on the side portion of the field shield (9). Then, source and drain layers (6) are formed on the main surface of the semiconductor substrate (1) so as not to overlap with the field shield (9). According to the semiconductor device, since the field shield (9) is the offset gate, it is possible to set high the threshold value on a parasitic MOS transistor and miniaturize the elements.

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patent: 4702000 (1987-10-01), Matlock et al.
patent: 4766474 (1988-08-01), Nakagawa
patent: 4786954 (1988-11-01), Morie et al.
patent: 4818725 (1989-04-01), Lichtel, Jr. et al.
patent: 4908683 (1990-03-01), Matlock et al.

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