CMOS logic gate clamping circuit

Details CMOS logic gate clamping circuit CMOS logic gate clamping circuit

1993-10-15

1995-08-15

Westin, Edward P.

Electronic digital logic circuitry

Accelerating switching

326 29, 326 83, 327546, H03K 1901, H03K 190175

Patent

active

054423040

ABSTRACT:
A gate clamping circuit is disclosed that includes a logic gate and a bias circuit arrangement. Through this clamping circuit the speed of operation of the circuit during both low to high and high-to-low transitions of the output signal are optimized while power consumption is minimized.

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