CMOS integrated circuits with reduced substrate defects

Details CMOS integrated circuits with reduced substrate defects CMOS integrated circuits with reduced substrate defects

1997-06-30

1999-08-10

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

257301, 156648, 438207, 438433, H01L 21306, H01L 2176

Patent

active

059372885

ABSTRACT:
A complementary metal oxide (CMOS) integrated circuit configured for reducing the formation of silicon defects in its silicon substrate during manufacture. The silicon defects are formed from silicon interstitials present in the silicon substrate. The CMOS integrated circuit includes a deep implantation region formed within the silicon substrate. There is further included at least one vertical trench formed in the silicon substrate. The trench is formed such that at least a portion of the trench penetrates into the deep implantation region of the silicon substrate to present vertical surfaces within the deep implantation region, thereby allowing the silicon interstitials to recombine at the vertical surfaces.

REFERENCES:
patent: 4495025 (1985-01-01), Haskell
patent: 4653177 (1987-03-01), Lebowitz et al.
patent: 5298450 (1994-03-01), Verret
patent: 5675176 (1997-10-01), Ushiku et al.
patent: 5691550 (1997-11-01), Kohyama
patent: 5698878 (1997-12-01), Miyashita et al.
S. Wolf Silicin Processing for the VSLI ERA Lattice press pp. 600-603, 606-607,665 1990.

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