Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-03-30
2000-04-11
Fahmy, Wael M.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438770, 438775, H01L 218234
Patent
active
060487690
ABSTRACT:
A CMOS integrated circuit having a PMOS and NMOS device with different gate dielectric layers. According to the present invention, an NMOS transistor is formed on a p-type conductivity region of a semiconductor substrate. The NMOS transistor has first gate dielectric layer formed on the p-type conductivity region. A PMOS transistor is formed on a n-type conductivity region of the semiconductor substrate. The PMOS transistor has a second gate dielectric layer wherein the second gate dielectric layer has a different composition than the first gate dielectric layer.
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Fahmy Wael M.
Intel Corporation
Pham Long
LandOfFree
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