CMOS input stage

Details CMOS input stage CMOS input stage

1993-09-29

1995-08-22

Hudspeth, David R.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Signal level or switching threshold stabilization

326 81, 326 87, H03K 1716, H03K 190175

Patent

active

054443920

ABSTRACT:
A CMOS input stage for operation with a supply voltage selectively having a first value or a second higher value, includes a supply voltage terminal selectively receiving a first value or a second value of a supply voltage during operation, a reference potential terminal, and an input terminal. A first field effect transistor of a first conduction type has a load path and a gate terminal, and a second field effect transistor of a second conduction type has a load path and a gate terminal. The load paths of the field effect transistors are connected in series between the supply voltage terminal and the reference potential terminal. The gate terminals of the field effect transistors are connected to the input terminal. A control device adjusts a resistance of the load path of at least one of the field effect transistors as a function of a particular value selected for the supply voltage.

REFERENCES:
patent: 4555642 (1985-11-01), Morales
patent: 4616143 (1986-10-01), Miyamotot
patent: 4929852 (1990-05-01), Bae
patent: 4929853 (1990-05-01), Kim et al.
patent: 4937476 (1990-06-01), Bazes
patent: 5021685 (1991-06-01), Kihara
patent: 5313118 (1994-05-01), Lundberg
Halbleiter-Schaltungstechnik, (Tietze et al) 8th Edition 1986, pp. 211-213.

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