CMOS device with improved performance and method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S206000, C257SE27062

Reexamination Certificate

active

11179434

ABSTRACT:
A complementary metal oxide semiconductor (CMOS) device having improved performance includes a first device active region including at least one pair of transistor active regions wherein one transistor active region has a first width and the other transistor active region for forming a contact has a second width, a first gate arranged on the first device active region, a MOS transistor of a first conductivity type including a source/drain region of the first conductivity type formed in the first device active region, a second device active region having a third width greater than the first width, a second gate arranged on the second device active region, and a MOS transistor of a second conductivity type including a source/drain region of the second conductivity type formed in the second device active region.

REFERENCES:
patent: 4727045 (1988-02-01), Cheung et al.
patent: 5763926 (1998-06-01), Yamamoto et al.
patent: 6399434 (2002-06-01), Chaloux et al.
patent: 6608744 (2003-08-01), Kato
patent: 6974981 (2005-12-01), Chidambarrao et al.
patent: 2002/0177260 (2002-11-01), Matsumoto
patent: 2004/0075141 (2004-04-01), Maeda et al.
patent: 3-225963 (1991-10-01), None
patent: 2002-231951 (2002-08-01), None
patent: 2003-142681 (2003-05-01), None

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