CMOS device and fabricating method thereof

Details CMOS device and fabricating method thereof CMOS device and fabricating method thereof

2006-03-24

2009-11-10

Leja, Ronald W (Department: 2836)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

Reexamination Certificate

active

07615434

ABSTRACT:
A CMOS device is provided, comprising a substrate, a first-type MOS transistor, a second-type MOS transistor, a first stress layer, a first liner layer, and a second stress layer. The substrate has a first active area and a second active area, which are separated by an isolation structure. Further, the first-type MOS transistor is disposed on the first active area of the substrate, and the second-type MOS transistor is disposed on the second active area of the substrate. The first stress layer is compliantly disposed on the first-type MOS transistor of the first active area. The first liner layer is compliantly disposed on the first stress layer. The second stress layer is compliantly disposed on the second-type MOS transistor of the second active area.

REFERENCES:
patent: 4271583 (1981-06-01), Kahng et al.
patent: 6573172 (2003-06-01), En et al.
patent: 2004/0104405 (2004-06-01), Huang et al.
patent: 2005/0214998 (2005-09-01), Chen et al.
patent: 2005/0263825 (2005-12-01), Frohberg et al.

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