CMOS compatible process for making a charge trapping device

Details CMOS compatible process for making a charge trapping device CMOS compatible process for making a charge trapping device

2006-09-19

2006-09-19

Vu, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257SE21210

Reexamination Certificate

active

07109078

ABSTRACT:
A method of making an n-channel metal-insulator-semiconductor field-effect transistor (MISFET) that uses charge trapping for altering channel conductivity characteristics is disclosed. Other suitable and conventional processing steps are used to finalize completion of the fabrication of the charge trapping device so that the entire process is compatible and achieved with CMOS processing techniques, and so that non-charge trapping devices can be formed at the same time in a common sequence of manufacturing operations.

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