CMOS circuits including a passive element having a low end...

Details CMOS circuits including a passive element having a low end... CMOS circuits including a passive element having a low end...

2007-12-14

2009-02-17

Vu, Hung (Department: 2811)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S199000, C438S200000

Reexamination Certificate

active

07491598

ABSTRACT:
The present invention relates to complementary metal-oxide-semiconductor (CMOS) circuits, as well as methods for forming such CMOS circuits. More specifically, the present invention relates to CMOS circuits that contain passive elements, such as buried resistors, capacitors, diodes, inductors, attenuators, power dividers, and antennas, etc., which are characterized by an end contact resistance of less than 90 ohm-microns. Such a low end resistance can be achieved either by reducing the spacer widths of the passive elements to a range of from about 10 nm to about 30 nm, or by masking the passive elements during a pre-amorphization implantation step, so that the passive elements are essentially free of pre-amorphization implants.

REFERENCES:
patent: 5939753 (1999-08-01), Ma et al.
patent: 6166416 (2000-12-01), Kim
patent: 6225658 (2001-05-01), Watanabe
patent: 6462386 (2002-10-01), Moriwaki et al.
patent: 6707116 (2004-03-01), Ohkubo et al.

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